Metal-oxide semiconductor field effect transistors (MOSFETS) are a common type of power switching device. A MOSFET device includes a source region, a drain region, a channel region extending between the source and drain regions, and a gate structure provided adjacent to the channel region. The gate structure includes a conductive gate electrode layer disposed adjacent to and separated from the channel region by a thin dielectric layer.
When a MOSFET device is in the on state, a voltage is applied to the gate structure to form a conduction channel region between the source and drain regions, which allows current to flow through the device. In the off state, any voltage applied to the gate structure is sufficiently low so that a conduction channel does not form, and thus current flow does not occur. During the off state, the device must support a high voltage between the source and drain regions.
Today's high voltage power switch market is driven by two major parameters: breakdown voltage (BVdss) and on-state resistance (Rdson). For a specific application, a minimum breakdown voltage is required, and in practice, designers typically can meet a BVdss specification. However, this is often at the expense of Rdson. This trade-off in performance is a major design challenge for manufacturers and users of high voltage power switching devices.
Recently, superjunction devices have gained in popularity to improve the trade-off between Rdson and BVdss. In a conventional n-channel superjunction device, multiple heavily-doped diffused n-type and p-type regions replace one lightly doped n-type epitaxial region. In the on state, current flows through the heavily doped n-type regions, which lowers Rdson. In the off or blocking state, the heavily doped n-type and p-type regions deplete into or compensate each other to provide a high BVdss. Although superjunction devices look promising, significant challenges still exist in manufacturing them.
Another problem with present high voltage power switch products is that they typically require a large input (e.g., gate or control electrode) charge for switching from one state to another. This requirement places, among other things, an extra burden on peripheral control circuitry.
Accordingly, high voltage power switching device structures and methods of manufacture are needed that provide lower Rdson, high BVdss, and that reduce input charge.
For simplicity and clarity of illustration, elements in the figures are not necessarily to scale, and the same reference numbers in different figures denote the same elements. Additionally, descriptions and details of well-known steps and elements are omitted for simplicity of the description. As used herein current carrying electrode means an element of a device that carries current through the device such as a source or a drain of an MOS transistor or an emitter or a collector of a bipolar transistor or a cathode or anode of a diode, and a control electrode means an element of the device that controls current through the device such as a gate of an MOS transistor or a base of a bipolar transistor. Although the devices are explained herein as certain N-channel or P-channel devices, a person of ordinary skill in the art will appreciate that complementary devices are also possible in accordance with the present invention. For clarity of the drawings, doped regions of device structures are illustrated as having generally straight line edges and precise angular corners. However, those skilled in the art understand that due to the diffusion and activation of dopants the edges of doped regions are generally not straight lines and the corners are not precise angles.
In addition, the device of the present invention may embody either a cellular design (where the body regions are a plurality of cellular regions) or a single body design (where the body region is compromised of a single region formed in an elongated pattern, typically in a serpentine pattern). However, the device of the present invention will be described as a cellular design throughout the description for ease of understanding. It should be understood that it is intended that the present invention encompass both a cellular design and a single base design.